NES (6502) Assembly Notes

The following Gist demonstrates how to create a 16-bit counter using 6502 assembly. It increments the Least Significant Byte (LSB) and the Most Significant Byte (MSB) separately in such a way that the MSB is incremented once for every 256 increments of the LSB, totalling 65536 iterations.

The following Gist demonstrates how to get the 8-bit Nintendo (NES) to render a 4 part sprite of /sprites/ with 6502 pure assembly. I generally shadow SPR-RAM in general purpose RAM from address $0200 and when the VBlank NMI occurs, I ask the Direct Memory Access controller at $4014 to transfer RAM to SPR-RAM.

You cannot write to the Picture Processing Unit’s internal RAM when it’s busy working (unless you want visible rendering glitches), you have to wait for the V-Blank Non-Maskable Interrupt (NMI); V-Blank means that the last scan-line for the current frame has been drawn to the screen and that the PPU will be idle for approximately 2250 (exact number varies depending on the exact NES model) CPU cycles.

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